FPGA Developer
Eqvilentjobs
WorldwideFully remoteFull TimeMid LevelInformation Technology
Posted 3 hours ago3h agoApply link checked 2 hours ago
Why we think you can apply
- Hiring model
- Open worldwide · the employer states no country restriction
- Work from
- Anywhere, the UAE included
Posted 3 hours ago · apply link checked 2 hours ago
About the role
Responsibilities
- Design, develop, and optimize FPGA-based solutions for ultra-low-latency trading systems
- Integrate FPGA solutions with software developers into system architectures
- Implement hardware-accelerated protocol parsing, order entry, and market data processing
- Perform timing analysis, timing closure, resource optimization, and latency measurements
- Collaborate with traders and researchers to identify opportunities
- Monitor and troubleshoot system performance in a live trading environment
Requirements
- Bachelor's or Master's degree in Electrical Engineering or related field
- Proficiency in Verilog/SystemVerilog
- Experience with FPGA design tools (Xilinx Vivado or Altera Quartus)
- Experience with FPGA debugging tools (ILA, SignalTap, Chipscope)
- Experience with simulation tools (Questa/ModelSim)
Preferred Qualifications
- Programming and scripting skills in TCL, C++, or Python
- Experience with peripheral integration (10G PHY/MAC, PCIe)
- Experience with custom network stack implementations (TCP/UDP)
Benefits
- Flexible schedule and 40 paid days off
- Competitive salary
- Work remotely from anywhere, with access to global offices
About the Company
- High-frequency trading team working on cutting-edge hardware and technology
What we look for
- Bachelor's or Master's degree in Electrical Engineering or related field
- Proficiency in Verilog/SystemVerilog
- Experience with FPGA design tools (Xilinx Vivado or Altera Quartus)
- Experience with FPGA debugging tools (ILA, SignalTap, Chipscope)
- Experience with simulation tools (Questa/ModelSim)
- Programming and scripting skills in TCL, C++, or Python
- Experience with peripheral integration (10G PHY/MAC, PCIe)
- Experience with custom network stack implementations (TCP/UDP)
PythonC++FPGASystemVerilogTCLQuestaVivadoModelSimVerilogPCIeQuartusTiming AnalysisTCP/UDP
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